The high-performance motor drive chip FU6881 incorporates MotionEngine (ME) core and 8051 core. ME core integrates FOC, MDU, LPF, PID and SVPWM modules that allow for automatic calculation of FOC or square-wave control by the hardware for sensored/sensorless BLDC/PMSM motors, and implements SVPWM control for the two phase step motor. 8051 core is used for parameter configuration and routine processing. Most of 8051 core instruction cycle takes 1T or 2T clock cycle(s).
The dual cores work in parallel to achieve high-performance motor control. The chip integrates high-speed operational amplifiers, comparators, high-speed ADC, CRC, SPI, I2C, UART, LIN and Timers. The LIN module supports auto-addressing for multiple slave devices at different baud rates, and the built-in MOS driver delivers up to 1A drive current. Also, the chip offers built in high-voltage LDO, making it suitable for FOC or square-wave based BLDC/PMSM motors and SVPWM based two-phase step motors.
| P/N: | FU6881 Q | ||
| Package | QFN40 5×5 | ||
| Motion Engine ME | x | ||
| FOC Hardware | x | ||
| SVPWM Hardware | x | ||
| BLDC Hardware | x | ||
| Single Phase | – | ||
| PI/PID | 4 | ||
| LPF | 4 | ||
| MDU | 4 | ||
| Sin/Cos/Atan | 4 | ||
| PFC Hardware | – | ||
| MCU core | 8051 | ||
| MIPS [MHz] | 20 | ||
| Flash [kB] | 32 | ||
| RAM [kB] | 4 | ||
| GPIO | 16 | ||
| I²C | 1 | ||
| UART | 1 | ||
| SPI | 1 | ||
| CAN | – | ||
| LIN | 1 | ||
| DMA | 2 | ||
| Timer | 6 | ||
| WDT | 1 | ||
| PreDriver | – | ||
| Driver Voltage [V] | 6,5 … 20 | ||
| Drive Current, max. + [A] | 1 | ||
| Drive Current, max. – [A] | 1 | ||
| Sensor/Sensorless Square Wave | x | ||
| Sensor SVPWM | x | ||
| Sensor FOC | x | ||
| Sensorless FOC | x | ||
| ADC | 1 | ||
| ADC channels | 12 | ||
| ADC resolution [bit] | 11 | ||
| DAC | 1 | ||
| DAC resolution [bit] | 6 | ||
| OP | 4 | ||
| Comparators | 2 | ||
| Temp. Range (6,5-20V) | -40…85°C |
